This standard is embodied in the Std_logic_1164 package declaration and the semantics of the Std_logic_1164 body. An annex is provided to suggest ways in which one might use this package.
- Sponsor Committee
- C/DA - Design Automation
- Superseded Standard
- Board Approval
- ANSI Approved:
Working Group Details
IEEE Standard VHDL Language Reference Manual
Replaced by 61691-1-1 Dual-logo document. Revision of the IEEE Std 1076, 2000 Edition Abstract: VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language.