Administratively withdrawn January 2007. A common bus architecture (which includes functional components--modules, nodes,and units--and their address space, transaction set, CSRs, and configuration information) suitable for both parallel and serial buses is provided in this standard. Bus bridges are enabled by the architecture, but their details are beyond its scope. Configuration information is self- administered by vendors and organizations based upon IEEE Registration Authority company_id.
- Sponsor Committee
- C/MSC - Microprocessor Standards Committee
Learn More - Status
- Inactive-Withdrawn Standard
- PAR Approval
- 1996-12-10
- Superseding
- 1212-1991
- Board Approval
- 2001-12-06
- History
-
- Withdrawn:
- 2007-01-18
- ANSI Approved:
- 2002-05-02
- Published:
- 2002-09-06
Working Group Details
- Society
- IEEE Computer Society
Learn More - Sponsor Committee
- C/MSC - Microprocessor Standards Committee
Learn More - Working Group
-
1212_WG - Control and Status Registers Working Group
Learn More - IEEE Program Manager
- Tom Thompson
Contact - Working Group Chair
- Brian Batchelder
No Active Projects
No Active Standards
No Superseded Standards
No Inactive-Withdrawn Standards
No Inactive-Reserved Standards