Inactive-Reserved Standard

IEEE 1285-2005

IEEE Standard for Scalable Storage Interface

This document specifies a scalable interface between mass-storage devices and controlling hard-ware/software. The interface has been optimized for low-latency interconnects, assuming that the proces-sor/controller and the storage device can often be co-located on the same printed-circuit board. The interface can also be used with longer-distance bus-like interconnects, including (but not limited to) IEEE Std 1394-1995 Serial Bus and IEEE Std 1596-1992 Scalable Coherent Interface.

Sponsor Committee
C/MSC - Microprocessor Standards Committee
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Status
Inactive-Reserved Standard
PAR Approval
2001-02-21
Board Approval
2005-09-22
History
ANSI Approved:
2005-12-29
Published:
2006-03-22
Reaffirmed:
2010-12-08
Inactivated Date:
2021-03-25

Working Group Details

Society
IEEE Computer Society
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Sponsor Committee
C/MSC - Microprocessor Standards Committee
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Working Group
1285_WG - Scalable Storage Interface Working Group
IEEE Program Manager
Tom Thompson
Contact
Working Group Chair
M Freeman
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