Inactive-Reserved Standard

IEEE 1394.1-2004

IEEE Standard for High Performance Serial Bus Bridges

The model, definition, and behaviors of High Performance Serial Bus bridges, which are devices that can be used to interconnect two separately enumerable buses, are specified.

Sponsor Committee
C/MSC - Microprocessor Standards Committee
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Status
Inactive-Reserved Standard
PAR Approval
2001-02-21
Board Approval
2004-12-08
History
ANSI Approved:
2005-04-12
Published:
2005-07-01
Reaffirmed:
2009-09-11
Inactivated Date:
2020-03-05

Working Group Details

Society
IEEE Computer Society
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Sponsor Committee
C/MSC - Microprocessor Standards Committee
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Working Group
1394_WG - High Performance Serial Bus Working Group
IEEE Program Manager
Tom Thompson
Contact
Working Group Chair
Ashley Butterworth
No Active Projects

1394.2

Standard for Serial Express: A Scalable Gigabit Extension to the IEEE Standard Serial Bus

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1394-1995

IEEE Standard for a High Performance Serial Bus

A high-speed serial bus that integrates well with most IEEE standard 32-bit and 64-bit parallel buses, as well as such nonbus interconnects as the IEEE Std 1596-1992, Scalable Coherent Interface, is specified. It is intended to provide a low-cost interconnect between cards on the same backplane, cards on other backplanes, and external peripherals. This standard follows the IEEE Std 1212-1991 Command and Status Register (CSR) architecture.

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1394a-2000

IEEE Standard for a High Performance Serial Bus (Amendment)

Amended information for a high-speed Serial Bus that integrates well with most IEEE standard 32-bit and 64-bit parallel buses is specified. This amendment is intended to extend the usefulness of a low-cost interconnect between external peripherals, as described in IEEE Std 1394-1995. This amendment to IEEE Std 1394-1995 follows the ISO/IEC 13213:1994 Command and Status Register (CSR) Architecture.

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1394c-2006

IEEE Standard for a High-Performance Serial Bus--Amendment 3

Supplemental Information for a high-speed serial bus that integrates well with most IEEE standard 32-bit and 64-bit parallel buses is specified. It is intended to extend the usefulness of a low-cost interconnect between external peripherals. This standard follows the IEEE Std 1212-2001 command and status register (CSR) architecture. Remarks: Amendment to IEEE Std 1394-1995 including IEEE Std 1394a-2000 and IEEE Std 1394b-2002

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1394c-2006

IEEE Standard for a High Performance Serial Bus - Amendment 3

Supplemental Information for a high-speed serial bus that integrates well with most IEEE standard 32-bit and 64-bit parallel buses is specified. It is intended to extend the usefulness of a low-cost interconnect between external peripherals. This standard follows the IEEE Std 1212-2001 command and status register (CSR) architecture. Remarks: Amendment to IEEE Std 1394-1995 including IEEE Std 1394a-2000 and IEEE Std 1394b-2002

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No Inactive-Withdrawn Standards

1394-2008

IEEE Standard for a High-Performance Serial Bus

This standard provides specifications for a high-speed serial bus that supports both asynchronous and isochronous communication and integrates well with most IEEE standard 32-bit and 64-bit parallel buses. It is intended to provide a low-cost interconnect between cards on the same backplane, cards on other backplanes, and external peripherals. Interfaces to longer distance transmission media [such as unshielded twisted pair (UTP), optical fiber, and plastic optical fiber (POF)] allow the interconnection to be extended throughout a local network. This standard follows the command and status register (CSR) architecture of IEEE Std 1212-2001.

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1394.3-2003

IEEE Standard for a High Performance Serial Bus Peer-to-Peer Data Transport Protocol (PPDT)

This standard defines a peer-to-peer data transport (PPDT) protocol between Serial Bus devices that implement Serial Bus Protocol 2 (SBP-2). The facilities specified include device and service discovery, self-configurable (plug and play) binding, and connection management.

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