
Ways for integrated circuit designers to analyze chip timing and power consistently across a broad set of electric design automation (EDA) applications are covered in this standard. Methods by which integrated circuit vendors can express timing and power information once per given technology are also covered. In addition, the means by which EDA vendors can meet their application performance and capacity needs are discussed.
- Sponsor Committee
- C/DA - Design Automation
Learn More - Status
- Active Standard
- PAR Approval
- 2019-06-13
- Superseding
- 1481-2009
- Board Approval
- 2019-11-07
- History
-
- Published:
- 2020-03-13
Working Group Details
- Society
- IEEE Computer Society
Learn More - Sponsor Committee
- C/DA - Design Automation
Learn More - Working Group
-
WG1481R - Integrated Circuit (IC) Open Library Architecture (OLA) Working Group
Learn More - IEEE Program Manager
- Vanessa Lalitte
Contact - Working Group Chair
- Stanley Krolikoski
1481-1999
IEEE Standard for Integrated Circuit (IC) Delay and Power Calculation System
Ways for integrated circuit designers to analyze chip timing and power consistently across a broad set of electric design automation (EDA) applications are covered in this standard. Methods by which integrated circuit vendors can express timing and power information once per given technology are also covered. In addition, this standard covers means by which EDA vendors can meet their application performance and capacity needs.
1481-2009
IEEE Standard for Integrated Circuit (IC) Open Library Architecture (OLA)
Ways for integrated circuit designers to analyze chip timing and power consistently across a broad set of electric design automation (EDA) applications are covered in this standard. Methods by which integrated circuit vendors can express timing and power information once per given technology are also covered. In addition, this standard covers means by which EDA vendors can meet their application performance and capacity needs.