Active Standard

IEEE 1838-2019

IEEE Standard for Test Access Architecture for Three-Dimensional Stacked Integrated Circuits

IEEE Std 1838 is a die-centric standard; it applies to a die that is intended to be part of a multi-die stack. This standard defines die-level features that, when compliant dies are brought together in a stack, comprise a stack-level architecture that enables transportation of control and data signals for the test of (1) intra-die circuitry and (2) inter-die interconnects in both (a) pre-stacking and (b) post-stacking situations, the latter for both partial and complete stacks in both pre-packaging, post-packaging, and board-level situations. The primary focus of inter-die interconnect technology addressed by this standard is through-silicon vias (TSVs); however, this does not preclude its use with other interconnect technologies such as wire-bonding

Sponsor Committee
C/TT - Test Technology
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Status
Active Standard
PAR Approval
2011-02-02
Board Approval
2019-11-07
History
Published:
2020-03-13

Working Group Details

Society
IEEE Computer Society
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Sponsor Committee
C/TT - Test Technology
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Working Group
3DT-WG - 3D-Test Working Group
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IEEE Program Manager
Tom Thompson
Contact
Working Group Chair
Adam Cron
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